The Copper Wall: How Engineers Are Racing to Keep AI's Wires From Melting Down

Everyone now talks about the AI race like its only about chips. Whoever builds the fastest GPU wins, right? Not quite. There’s a much less glamorous problem lurking underneath the whole industry, and it has nothing to do with how fast a processor can crunch numbers. It’s about how fast those processors can interact between each other.

Picture an AI supercomputer as a stadium full of thousands of workers who all need to shout information back and forth constantly to get anything done. If they can’t communicate between each other quickly, it doesn’t matter how smart any individual worker is, the whole operation slows down. That’s essentially what’s happening inside today’s AI data centres. The copper wires connecting processors, memory, and network switches are running out of road, which engineers are now calling the “copper wall”.

Copper wiring is still great operating at short distances as it is cheap, reliable, and easy to work with. The trouble starts when you try to push data through it faster and faster. At very high speeds, electrical signals travelling through circuit boards, connectors, and cables start to weaken and pick up interference, a bit like a radio station fading to static the further you drive from the tower.

To compensate, engineers bolt on extra circuitry, things like signal boosters and specialized chips that clean up and retime the data so it arrives intact. All of that extra hardware draws more power and releases even more heat, piling onto data centres that are already straining to stay cool (Optical Internetworking Forum, 2022).

Here’s the part which surprises people, the cables aren’t melting. The real issue is that it’s taking more and more energy just to move each individual bit of information from one place to another. Multiply that by the billions of data transfers happening every second inside a large AI cluster, GPUs constantly swapping model parameters and intermediate results, and you get a system where expensive, cutting-edge processors spend real time just sitting idle, waiting for data to arrive. In other words, the network isn’t just plumbing connecting the computer anymore, it’s effectively become part of the computer itself.

If electricity is hitting a wall, the industry’s answer is to stop relying on it entirely for the long hauls, and switch to light instead. That’s the idea behind silicon photonics and Co-Packaged Optics (CPO).

Here’s roughly how it works: an electrical signal controls a microscopic device called an optical modulator, which imprints the data onto a laser beam. That beam of light then travels through tiny channels called waveguides, essentially a light wire, before a photodetector on the other end converts it back into an electrical signal that the receiving chip can understand. Because all of this can be manufactures using the same techniques used to make ordinary computer chips, manufacturers can pack huge numbers of these optical components onto a single piece of silicon (Intel, 2024).

(NVIDIA, 2025)

One of light’s biggest advantages is that a single strand of fibre can carry many separate streams of data at once, using a technique called wavelength-division multiplexing, essentially giving each data stream its own “colour” of light so they don’t interfere with one another. Intel demonstrated this in 2024 with an optical chiplet that moved up to four terabits of data per second in both directions, using 64 channels running in parallel, and could send data reliably across cables up to 100 metres long (Intel, 2024). For comparison, that’s a distance and a data rate that conventional high-speed copper links really can’t match without burning far more power.

Just bolting an optical converter onto the edge of a circuit board isn’t enough on its own though. Data still has to travel electrically from the main processor to wherever that optical module sits, and that short electrical trip is exactly where a lot of the energy loss happens.

That’s the thinking behind co-packaged optics, or CPO: instead of placing the optical hardware off to the side, manufacturers mount it directly next to the main switching chip, inside the same package. That shrinks the electrical portion of the journey down to just a few millimetres instead of the length of an entire circuit board. According to the Optical Internetworking Forum, this shorter electrical path means less signal loss and allows engineers to use low-power components to drive the connection (OIF, 2022).

This isn’t just theoretical anymore, chipmakers area actively racing to build it. TSMC has been developing something called COUPE (Compact Universal Photonic Engine), aimed at weaving photonic connections directly into the advanced packaging it already uses for AI accelerator chips, including its CoWoS packaging platform (TSMC, 2024). And Nvidia has moved even faster than expected: at its GTC 2025 conference, the company unveiled its Quantum-X and Spectrum-X switch families, which build co-packaged silicon photonics straight into the switch chip itself. Nvidia says the approach can cut networking power use by roughly 3.5 times compared with older plug-in optical modules, while pushing up to 1.6 terabits per second through a single port, all built on manufacturing technology from TSMC (Nvidia, 2025). It’s a strong signal that this technology isn’t a distant lab experiment; its already shipping into real AI infrastructure.

(NVIDIA, 2025)

However, none of this comes for free of course. Cramming lasers and delicate optical components right next to a switching chip that might be generating hundreds of watts of heat creates real engineering challenges since those components tend to be sensitive to temperature swings. Fibre connections also have to be aligned with painstaking precision, and if something breaks inside a tightly packed optical engine, fixing it is a lock trickier than just swapping out a plug-in module. To deal with this, engineers are working on external, replaceable laser units and standardized optical connectors, so technicians can service these systems without tearing the whole thing apart (OIF, 2022).

Copper isn’t going away either, it’s still the cheapest and most efficient option for the very shortest connections inside a chip package. What’s changing is where the handoff from electricity to light happens. That crossover point keeps creeping closer and closer to the processor itself.

The copper wall is a reminder that the AI boom isn’t just a story about transistor counts and bigger chips. It’s just as much a story about plumbing, packaging, power delivery, and heat management, the unglamorous infrastructure that has to keep pace behind the scenes. Silicon photonics and co-packaged optics won’t make an AI model think any faster on their own. But without them, the wiring itself risks becoming the thing that finally slows the whole revolution down.

REFERENCES

Intel. (2024). Intel Demonstrates First Fully Integrated Optical I/O Chiplet. https://newsroom.intel.com/artificial-intelligence/intel-unveils-first-integrated-optical-io-chiplet

NVIDIA. (2025). NVIDIA Announces Spectrum-X Photonics, Co-Packaged Optics Networking Switches to Scale AI Factories to Millions of GPUs. https://nvidianews.nvidia.com/news/nvidia-spectrum-x-co-packaged-optics-networking-switches-ai-factories

NVIDIA. (2025) Explore the Best of GTC 2026. https://www.nvidia.com/gtc/

NVIDIA. (2025) AI Factories Are Redefining Data Centers and Enabling the Next Era of AI. https://blogs.nvidia.com/blog/ai-factory/

Optical Internetworking Forum. (2022). Co-Packaging Framework Document. https://www.oiforum.com/wp-content/uploads/OIF-Co-Packaging-FD-01.0.pdf

TSMC. (2024). TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership. https://pr.tsmc.com/english/news/3136